The present invention concerns improved Hall effect devices generally and more particularly relates to improved linearity of interfaces for Hall effect devices. Such Hall effect devices are particularly useful for incorporation into power meters, for placement in ferromagnetic core gaps for metering electrical power being drawn from a power grid.
One use of Hall effect sensors is in power meters designed to measure electrical power consumption. One example of such a power meter arrangement with inclusion and use of a Hall effect sensor is disclosed in commonly owned U.S. Pat. No. 5,694,103, issued to Goodwin, et al.
Goodwin, et al. discloses a ferromagnetic core arrangement having a central core leg defining a core gap in which a Hall effect sensor is located. The sensor produces a measurable Hall voltage that is proportional to the magnetic flux density within the gap and to the bias current supplied to the sensor. If the bias current is made proportional to the instantaneous line voltage, the Hall output becomes a measure of power. Hence, the power meter may be used for measuring power consumption from an associated power grid.
In general, additional or complicated stages in any sensing or metering system can create the possibility of reduced signal quality and/or higher costs. Also, certain components inherently have the potential to interject certain noise signals into an overall system. For example, operational amplifiers may have input offset voltages and Hall effect devices may have output offset voltages which could otherwise affect the linearity of any system in which they are used.
One particular potential problem can occur at relatively low magnetic flux levels. In such instances, the output voltage of the Hall device would ordinarily be relatively small as compared to potential offset voltage levels. Hence, under such conditions, particular problems may exist with obtaining quality metering, especially concerning the linearity of the collective system
Still another potential source of noise signals is the occurrence of common mode voltages. These typically must otherwise be rejected by following system electronics, or otherwise they will appear at the system level as noise.
Yet another potential difficulty causing system degradation arises from temperature effects and component values. It is especially difficult to address certain such problems in the context of reducing costs, since relatively lower cost components may sometimes have wider specification tolerances and lesser desired responses to temperature effects. In other words, attempts to use lower cost components may in some instances exacerbate existing system problems.
The entire disclosure of the above-referenced issued U.S. Pat. No. 5,694,103 is fully incorporated herein by reference.
The presently disclosed technology recognizes and addresses various of the foregoing problems, and others, concerning Hall effect devices. Thus, broadly speaking, a principal object of this technology is improved Hall effect device operations. More particularly, a main concern is improved interfaces with Hall effect devices.
It is therefore another particular object of the present subject matter to provide interfaces having improved, high linearity for Hall effect devices. In such context, it is an overall objective to reduce and minimize offset effects without the use of complicated electronic circuits.
Similarly, another present object is to virtually eliminate common mode voltages that must otherwise be rejected by more expensive system electronics, or otherwise appear at a system level as noise.
Still a further more particular object of the present subject matter is to provide an improved interface system that provides exceptional performance at very low cost. At the same time, it is an object to provide such an improved system that is very robust to temperature effects and component values.
Additional objects and advantages of the disclosed technology are set forth in, or will be apparent to those of ordinary skill in the art from, the detailed description herein. Also, it should be further appreciated that modifications and variations to the specifically illustrated and discussed features hereof may be practiced in various embodiments and uses of this technology without departing from the spirit and scope thereof, by virtue of present reference thereto. Such variations may include, but are not limited to, substitution of equivalent means and features for those shown or discussed, and the functional or positional reversal of various parts, features, or the like.
Still further, it is to be understood that different embodiments, as well as different presently preferred embodiments, of this subject matter may include various combinations or configurations of presently disclosed features or their equivalents (including combinations of features or configurations thereof not expressly shown in the figures or stated in the detailed description).
One exemplary embodiment of the present subject matter relates to a Hall effect sensor with an improved output interface, wherein the Hall effect sensor and associated interface is characterized by high linearity and low offset performance. Such a Hall effect sensor preferably includes a Hall effect device characterized by first and second opposing surfaces and formed with first and second device inputs and first and second device outputs, a substrate layered adjacent to a selected one of the first and second opposing surfaces of the Hall effect device, an electrical connection between the substrate and one the first and second device outputs, and a biasing current. A capacitively coupled relationship is formed between the substrate and the upper layers of the Hall effect device at the surface opposing the substrate. Such capacitively coupled relationship preferably aids in reducing any charge trapping that occurs during operation of the Hall effect sensor. The device output to which the substrate is electrically connected is provided at a ground potential and the electrical connection forms in part a biasing circuit for eliminating undesirable offset effects due to non-symmetries in the Hall effect device and for eliminating common mode voltages. The biasing current is supplied to the Hall effect device at a level proportional to the line voltage with which the device and interface are associated.
Yet another exemplary embodiment of the disclosed technology relates to a power meter arrangement including a laminated ferromagnetic power meter core and a Hall effect sensor. The laminated ferromagnetic power meter core has a designated region thereof defining a core gap, and the Hall effect sensor resides in the core gap and is capable of sensing magnetic flux concerning current flow through an associated conductor line. The sensed levels of magnetic flux can then be utilized to derive power consumption data for the power meter arrangement. The Hall effect sensor residing in the core gap may correspond to such exemplary embodiment as described above.
Additional embodiments may comprise various combinations of the above referenced exemplary features (or their equivalents), and/or other features.
It is to be understood that the present subject matter likewise encompasses the use of methodologies and techniques which correspond with practice of the physical apparatuses and devices otherwise disclosed herein.
Those of ordinary skill in the art will better appreciate the features and aspects of such embodiments, methods, techniques, and others, upon review of the remainder of the specification.